Came to lab to start applying some of the logic locking applications to the Stratix Design. Unfortunately I have been learning a bit of how to use it on a Cyclone system, but the guide says that it varies from chip to chip. This means I'll have to tinker around with some of the different features of the Startix system compared to the Cyclone chip.
When we were about to hook up my laptop to the license server there was an issue from another license being downloaded recently. This halted all progress and we will have to try and fix this another day before we can start locking the components on the FEDM design.
That's it for today.
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